The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

RISC-V chip designer SiFive is introducing two new processors that the company says are designed for high-performance, energy-efficient applications such as wearables, smart home devices, virtual ...

RISC-V is an open-source Instruction Set Architecture (ISA) that rapidly transforms the CPU design and development landscape. Unlike proprietary ISAs, RISC-V allows free access to architecture ...

What is RISC-V? The basics of RISC-V. Applications and uses of RISC-V. RISC-V is described as an open standard instruction set architecture (ISA) that's based on the reduced instruction set computer ...

It’s an exciting time in the world of microprocessors, as the long-held promise of devices with open-source RISC-V cores is coming to fruition. Finally we might be about to see open-source from the ...

RISC-V International said it has grown during the pandemic as its RISC-V open source processor membership popped 130% in 2021. The nonprofit group's membership has grown from a ragtag group of feisty ...

The era of universal processor architectures is giving way to workload-specific designs optimized for performance, power, and scalability. As data-centric applications in artificial intelligence (AI), ...

RISC-V cores are beginning to show up in heterogeneous SoCs and packages, shifting from one-off standalone designs toward mainstream applications where they are used for everything from accelerators ...

RISC-V International is a global nonprofit association based in Switzerland. Founded in 2015 as the RISC-V Foundation with 29 members, RISC-V is now a truly global organization with over 700 members ...

RISC-V International, the global open hardware standards organization, has announced that Intel has joined RISC-V at the Premier membership level. Let that sink in for a minute. Intel, which has made ...

A new technical paper titled “Test-driving RISC-V Vector hardware for HPC” was published by researchers at University of Edinburgh. “Whilst the RISC-V Vector extension (RVV) has been ratified, at the ...

For those not immediately familiar with RISC-V, it is a relatively new CPU architecture which takes advantage of Reduced Instruction Set Computer (RISC) principles. RISC-V is an open standard ...