For developers using FPGAs for the implementation of floating-point DSP functions, one key challenge is how to decompose the computation algorithm into sequences of parallel hardware processes while ...

Native Floating-Point HDL code generation allows you to generate VHDL or Verilog for floating-point implementation in hardware without the effort of fixed-point conversion. Native Floating-Point HDL ...

Most of the algorithms implemented in FPGAs used to be fixed-point. Floating-point operations are useful for computations involving large dynamic range, but they require significantly more resources ...

Based on recent technological developments, high-performance floating-point signal processing can, for the very first time, be easily achieved using FPGAs. To date, virtually all FPGA-based signal ...

New Cores Leverage Stratix Device Family's Embedded DSP Blocks to Deliver a Cost-Effective Floating-Point FFT FPGA Solution San Jose, Calif., June 3, 2003—Altera Corporation (NASDAQ: ALTR) today ...

In this episode of This Week in HPC, Michael Feldman and Addison Snell from Intersect360 Research look at Altera’s FPGA floating-point makeover. After the break, they discuss IBM’s new POWER8 servers.

The accelerator story for top supercomputers is a strong one, starting with GPUs, which were snapped in as coprocessors on some of the world’s largest systems over the last five years. Since then, ...

Over the last couple of years, we have focused extensively on the hardware required for training deep neural networks and other machine learning algorithms. Focal points have included the use of ...

The quest for better throughput, faster changeover times, and less waste and downtimes has made machine-automation systems more complicated. Besides handling logic or process controls, systems today ...

Altera Corporation is a pioneer of programmable logic solutions and enabling systems. They are a leader with FPGAs. The field-programmable gate array (FPGA) is a semiconductor device that can be ...