Managing the power consumption of ICs is an increasingly difficult challenge, because each new generation of portable device includes expanded features and demands longer battery lives.
Non-mainstream technologies can offer advantages over more commonly used approaches, but usually at some additional cost (otherwise they’d probably be mainstream). The additional cost could be in ...
Silistix, an IP-bus and EDA startup originating from research performed by the University of Manchester and funded by Intel Capital, wants to help you make the next generation of SOCs (systems on ...
Unlock the full InfoQ experience by logging in! Stay updated with your favorite authors and topics, engage with content, and download exclusive resources. This article dives into the happens-before ...
Lack of coordination between asynchronous resets and synchronous logic clocks leads to intermittent failures on power up. In this series of articles, we discuss the requirements and challenges of ...
FIFO (First In First Out) is a buffer that stores data in a way that data stored first comes out of the buffer first. Asynchronous FIFO is most widely used in the System-on-Chip (SoC) designs for data ...
Component manufacturers can minimize energy use by working efficiency tactics into the design and intended operation of mechanical components. Tactics for moving an asynchronous system from IE3 to IE4 ...
Make a system call now, get the result later: a proposed kernel patch expands the possibilities for asynchronous I/O. The kernel’s support for asynchronous I/O is incomplete, and it always has been.
A monthly overview of things you need to know as an architect or aspiring architect. Unlock the full InfoQ experience by logging in! Stay updated with your favorite authors and topics, engage with ...
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